Softwares Include PC-Based from Euresys and FPGA-Based From Silicon Software
Euresys Open eVision 1.0 includes a modern, fast and simple software-based licensing system designed to help install the vision software tools and deploy the application on any platform. Open eVision 1.0 is a rich suite of reliable, powerful and flexible software tools dedicated to image processing and analysis. Open eVision contains a set of libraries (DLLs), ActiveX controls and .NET classes designed to be integrated into your application.
Silicon Software Visual Applets – Graphical FPGA Programming Tool is the awarded solution for realtime image processing on FPGAs with intuitive, graphical user interface. Visual Applets is a graphic-oriented tool, which dramatically simplifies the programming of image processing on FPGA hardware. Visual Applets is a high-level programming tool for image processing tasks on FPGAs. The self-explanatory graphical user interface is easy to use, fast to learn and inspirable for new solutions. Programs run on FPGA hardware in realtime. Image processing designs are arranged by the combination of operator modules, filter modules and transport links. The provided libraries include more than 200 hardware based operators for Machine Vision applications which cover standard as well as advanced image processing functions. The complete set of functions is implemented as hardware operators and guarantees an image processing in real-time.
Key Specifications/Special Features:
Euresys Open eVision 1.0 has a general purpose libraries which includes EasyImage, EasyColor, EasyObject, EasyMatch, EasyFind and EasyGauge cover applications such as image filtering and enhancement, blob analysis, pattern matching, alignment and metrology. The mark inspection libraries, EasyOCV, EasyOCR, EasyBarCode and EasyMatrix, include functions for optical character recognition, character printing inspection and 1D/2D barcode reading.
Silicon Software Visual Applets does not require knowledge in circuitry, synchronization, timings and FPGA programming. No VHDL complier required. It supports microEnable III and IV series, PixelPlant subboard series. Visual Applets are immediately usable in SDK and microDisplay. It supports Windows, Linux and QNX runtime environments. These reduce development times. It enables easy switching to different target architectures. No configuration is necessary for synchronization, timing or avoiding problems with side effects.
Both a synthesis and a high level simulation are integrated and offer full control over the final visual result of a design at any time. Complete process of the hardware design creation lasts 10-15 minutes on average; the hardware applet can immediately be used with the viewer and configuration software micro Display or be integrated in applications by use of the SDK.